First-in first-out (FIFO) memories are commonly used in electronics system and VLSI circuits. For instance, a FIFO memory can be used as a buffer between two circuits for asynchronous operations. In these cases, data may be written and read out simultaneously from FIFO memories with Input/Output ports operating at different frequency. In such devices, data could not be received and written in a single clock cycle. To overcome the drawbacks of single-port memories, a dual-port FIFO was developed. However, typical dual-port memories result in large penalty in terms of area, almost double that of a single-port memory of same dimensions. Moreover, dual-port FIFO memories can only be used for a single simultaneous read and write operation.
To overcome this problem FIFO memories with multi-port functionality are being developed. Conventional multi-port FIFO memories provide functionality wherein multiple write operations and a single read operation may be performed in first-in first-out mode. As with dual-port memory, the size of the multi-port memory with same dimensions is much bigger in comparison to the single-port or dual-port memories.
There is therefore a need for a FIFO memory which may provide multi-port functionality using single-port memories.